| |
| Features |
| |
| Fully
Integrated and Interactive |
| B2 Logic
allows you to build the circuit on the screen and test
it by placing probes in the circuit. As the simulation
progresses, the signal values change in the probes in
the circuit, as well as in a timing diagram and in a spreadsheet.
You can change the input values by clicking directly in
the inputs in the circuit. |
| |
| Multiple
Components |
| There are
over 100 primitives of components available. |
| |
| Multiple
Libraries |
| B2 Logic comes with five
built-in libraries. You can also create your own libraries. |
| |
| Customize
Device Properties |
| You can modify propagation
delays and other characteristics of devices in your circuit,
and of the models of devices in the libraries. |
| |
| Flexible
Analysis |
| With a click of the mouse,
you can specify initial conditions and delay times of
the circuit. |
| |
| Simulation
Diagnostics |
| B2 Logic reports timing
violations on dynamic components (e.g. flip-flops) to
the user while the circuit is running. |
| |
| Accurate Simulation |
| B2 Logic simulates the
propagation delays and set-up and hold times for each
device according to the specifications in the Logic Data
Books. |
| |
| Multiple Signal Values |
| The value of a signal consists
of both signal level and strength. There are three levels
and four strengths. |
| |
| Subcircuits |
| You can
build a circuit, save it, and then open it as a component
in another circuit. You can probe the inside of a subcircuit. |
| |
| Buses |
| B2 Logic allows you to
group a set of wires together into a single bus, which
keeps large circuits compact and easy to edit and debug. |
| |
| Generic PLD Simulation |
| Simulate PLD's from truth
tables, equations, or Espresso format tables. B2 Logic
supports internal flip-flops. You can simulate ROM from
data tables. |
| |
| Program Limitations |
| B2 Logic is not a printed
circuit board design package. It is useful for verifying
design ideas and for analyzing the timing of circuits.
B2 Logic circuits are not currently portable to other
programs. B2 Logic does not allow import of third party
parts libraries. |
| |
| Review
of Logic 2.2 in IEEE circuits and devices, July
1993 |
1 (low) to 5 (high) Was it easy
to use?
Did it do what it advertised?
Was it worth the price? No. of
hours to learn software |
5
5 4 .5
|
5 5
5 .5
|
|
| |
| Review
of Logic 2.2 in IEEE circuits and devices, July
1993 |
Input Ports Bidirectional Port
Output Probe Seven Segment Display
Bus Connectors Clock
High Voltage Ground Pull-Down
Resistor
Pull-Up Resistor
Buffer (Delay Element)
S-R Latch
Clocked SR Latch JKFF w/ Reset
& Clear PLD (generic)
Net Connectors Decoder (generic)
D Flip Flop (generic) RAM 16x4
RAM 1024x8 RAM 4096x8
ROM 32x8 ROM 256.32 ROM 4096x8
Seven Segment Display Toggle Flip
Flop User-defined circuit
7400/4 2-Inp. NAND 7401/4 2 Inp. NAND
OC 7402/4 2 Inp. NOR. 7404/6
Inverter 7405/6 Inverter OC
7406/6 Inv. Buff OC 7407 Buffer OC
7408/4 2 Inp. AND
|
7409/4 2 Inp. AND OC 7410/3 3
Inp. NAND 7411/3 3 Inp. AND
7412/3 3 Inp. NAND OC 7415/3 3 Inp. AND
OC 7420/2 4-Inp. NAND 7421/2
4-Inp. AND 7422/2 4-Inp. NAND OC
7425 NOR w/Strobe 7426/3 3 Inp.
NAND Buff OC 7427/3 3 Inp. NOR
7428/4 2 Inp. NOR Buff OC 7430 8-Inp.
NAND 7432/4 2-Inp. OR 7433/4
2-Inp. NOR Buff OC 7437 NAND Buffer
7438/4 2 Inp. NAND Buff OC 7442
BCD/Decimal Converter 7445 Decimal Decoder/Buffer
447 BCD/ 7 Seg Decoder 7449 BCD/
7 Seg Decoder 7451 AND-OR-Invert
7473/2 JK Flip Flop 7474/2 D Flip
Flop 7475 Quad D type latch
7476/2 JK Neg Edge-Trig FF 7477 Quad
D type latch 7482 Adder 7485
Comparator 7486/4 Exclusive OR
7489 Binary Rate Multiplier 7490 Decade
Counter 7491 8 bit shift Register
7492 Divide by 12 Counter |
7493 Binary Counter 74109/2 JK' FF
74112/2 Neg Edge FF 74113/2 JK
Neg- Edge FF w/Preset 74123
Monostable Vibrator 74126 A Tri State
Buffer 74136/4 X-OR OC 7418
Decoder 3-to-8 74139 A Decoder 2-to-4
74148 Priority Encoder 74151 Multiplexer
1-of-8 74153 Multiplexer 1-of-4
74157 Multiplexer 1-of-2 74161 4-Bit
Binary Ctr 74163A 4-Bit Binary Ctr
74169B Up-Down Binary Ctr 74175
Quad D FF 74181 Arithmetic Logic Unit
74192 Up-Down (dec) 74193 Up-Down
(hex) 74194 4-Bit Univ Shift Reg
74244 Octal Buffer 74245 Inv.
Octal Buffer 74245 Inv. octal buffer
74266/4 X-NOR OC 74279 R' S' Latch
74280 Parity generator 74373 Octal
Latch 74374 Octal D Reg 74381
ALU (8fn) 74393 4-Bit Binary Ctr
74541 Octal Buffer 74646 Reg/X-ceiver |
|
| |
| |
| Device
Primitives |
| Review
of Logic 2.2 in IEEE circuits and devices, July
1993 |
Input Ports Bidirectional Port
Output Probe Seven Segment Display
Bus Connectors Clock
High Voltage Ground Pull-Down
Resistor Pull-Up Resistor
Buffer (Delay Element)
S-R Latch Clocked SR Latch JKFF w/ Reset
& Clear PLD (generic)
Net Connectors Decoder (generic)
D Flip Flop (generic) RAM 16x4
RAM 1024x8 RAM 4096x8
ROM 32x8 ROM 256.32 ROM 4096x8
Seven Segment Display Toggle Flip
Flop User-defined circuit
7400/4 2-Inp. NAND 7401/4 2 Inp. NAND
OC 7402/4 2 Inp. NOR. 7404/6
Inverter 7405/6 Inverter OC
7406/6 Inv. Buff OC 7407 Buffer OC
7408/4 2 Inp. AND
|
7409/4 2 Inp. AND OC 7410/3 3
Inp. NAND 7411/3 3 Inp. AND
7412/3 3 Inp. NAND OC 7415/3 3 Inp. AND
OC 7420/2 4-Inp. NAND 7421/2
4-Inp. AND 7422/2 4-Inp. NAND OC
7425 NOR w/Strobe 7426/3 3 Inp.
NAND Buff OC
7427/3 3 Inp. NOR
7428/4 2 Inp. NOR Buff OC 7430 8-Inp.
NAND 7432/4 2-Inp. OR 7433/4
2-Inp. NOR Buff OC 7437 NAND Buffer
7438/4 2 Inp. NAND Buff OC 7442
BCD/Decimal Converter 7445 Decimal Decoder/Buffer
447 BCD/ 7 Seg Decoder 7449 BCD/
7 Seg Decoder 7451 AND-OR-Invert
7473/2 JK Flip Flop 7474/2 D Flip
Flop 7475 Quad D type latch
7476/2 JK Neg Edge-Trig FF 7477 Quad
D type latch 7482 Adder 7485
Comparator 7486/4 Exclusive OR
7489 Binary Rate Multiplier 7490 Decade
Counter 7491 8 bit shift Register
7492 Divide by 12 Counter |
7493 Binary Counter 74109/2 JK' FF
74112/2 Neg Edge FF 74113/2 JK
Neg- Edge FF w/Preset 74123
Monostable Vibrator 74126 A Tri State
Buffer 74136/4 X-OR OC 7418
Decoder 3-to-8 74139 A Decoder 2-to-4
74148 Priority Encoder 74151 Multiplexer
1-of-8 74153 Multiplexer 1-of-4
74157 Multiplexer 1-of-2 74161 4-Bit
Binary Ctr 74163A 4-Bit Binary Ctr
74169B Up-Down Binary Ctr 74175
Quad D FF 74181 Arithmetic Logic Unit
74192 Up-Down (dec) 74193 Up-Down
(hex)
74194 4-Bit Univ Shift Reg
74244 Octal Buffer 74245 Inv.
Octal Buffer 74245 Inv. octal buffer
74266/4 X-NOR OC 74279 R' S' Latch
74280 Parity generator 74373 Octal
Latch 74374 Octal D Reg 74381
ALU (8fn) 74393 4-Bit Binary Ctr
74541 Octal Buffer 74646 Reg/X-ceiver |
|
| |
| |
| System
Requirements |
PC
compatible
|
Macintosh
|
Powe
rMacintosh |
|
286 processor or higher, 386 recommended
2 Mb RAM min. 4 Mb recommended Microsoft Windows
3.1 or later |
System 6.0 or later
2 Mb RAM min. w/ system 6.0
4 Mb RAM min. w/ system 7.0
or later |
4 Mb RAM min. w/ system 7.0 or later |
|